IP - Intellectual Property

Produtos.

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IP - Intellectual Property

Oferecemos uma variedade de módulos IP core baseados em padrões que são rigorosamente testados e validados para fornecer as equipes de projeto os IPsmais confiáveis na indústria. Inclui: USB, USB Subsystem, Ethernet, Storage, MicroController, IP Interface, Mixed Signal, Memory-IP.

USB 2.0 OTG (On-The-Go)

The Mentor Graphics multi-point, Hi-Speed dual-role USB controller is supported through the use of an external DMA, or through an internal DMA controller which is built into the AMBA AHB interface.

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USB 2.0 High/Full-Speed Function

The Mentor Graphics® MUSBHSFC core provides a USB function controller that conforms to the USB 2.0 specification for Hi-/Full-Speed (480/12 Mbps) functions.

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Full-Speed USB 2.0 PHY

The MUSBFPHY IP PHY from Mentor Graphics® is an on-chip transceiver for USB On-The-Go (OTG) that complies with both the USB standard for Full-Speed functions and the OTG supplement to the USB 2.0 specifications. >

 

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High-Speed USB 2.0 PHY

MUSBHPHY from Mentor Graphics® is a Hi-Speed USB 2.0 transceiver for use with host, embedded host, On-The-Go (OTG), and function controllers. Compliant with the UTMI+ level 3 (USB 2.0 Transceiver Macrocell Interface Plus) specification, the MUSBHPHY integrates Hi-Speed, mixed-signal circuits to support Hi-Speed traffic at 480Mbps and is backward compatible to Full-Speed (12Mbps) and Low-Speed (1.5Mbps) data rates.

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USB Software Stack

Available in Mentor’s USB Subsystem IP, Mentor USB software is comprised of a software stack, class drivers, and controller — all are fully integrated, optimized, and verified to work with Mentor USB hardware IP.

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USB Subsystem

Mentor Graphics is the only IP vendor to offer a fully supported USB subsystem assembled from a combination of silicon-proven hardware and software IP.

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10/100 Platform

The PE-MACMII™ provides a 10/100 Mbps Ethernet Media Access Controller (MAC) for incorporation in a customer’s own ASIC design. The PE-MACMII module consists of six sub-modules. These sub-modules comprise the transmit and receive portions of the Ethernet MAC plus three supporting sub-modules.

 

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10/100/1000 Platform

The PE-MCXMAC™ provides a 10/100/1000 Mbps Ethernet Media Access Controller (MAC) with a GMII Gigabit Media Independent Interface for incorporation in a customer’s own ASIC design.

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10-Gigabit

The Mentor Graphics® A-XGMAC provides a 10-Gbps Ethernet Media Access Controller (MAC) for incorporation in a customer’s own ASIC or FPGA-based design. The A-XGMAC module performs the packet transmission and reception protocol as described in IEEE 802.3ae. This includes having a MAC control sublayer as defined in 802.3x. The optional SONET OC-192 data rate control in Clause 46 is also implemented.

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Serial ATA

The Mentor Graphics® Serial ATA (SATA) Host Controller provides an efficient and easy-to-use interface to SATA devices. The core implements transfer speeds of either 150 MB/s or 300 MB/s and emulates programmable I/O, multi-word direct memory access (DMA), and Ultra ATA modes of operation.

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Serial ATA 1.5/3.0 Gbps PHY

The Mentor Graphics® MSATA_PHY core provides PHY layer functionality
for a Serial ATA (SATA) interface operating at 3Gbps or 1.5Gbps.

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Parallel ATA

The Mentor Graphics® parallel ATA device controller is designed to interface between a host system and a storage controller in either solid state or rotating media.

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PCMCIA

The Mentor Graphics PCMCIA core provides an efficient and easy-to-use interface to devices that are PCMCIA card 2.1 compliant. The core generates read/write cycles for attribute memory, common memory, and I/O modes.

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M8051 MicroController

Mentor Graphics 8051 microcontroller is utilized across the board in consumer and industrial applications, it is field proven, reliable and mature, having taped out in dozens of projects in many different process nodes.

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M85C30 Serial Communications Controller

The M85230 is an enhanced version of the Mentor Graphics M85C30 serial
communications controller. The enhancements include: a deeper Transmit FIFO
(4bytes); a deeper Receive FIFO (8 bytes); a programmable FIFO level for
interrupts and DMA requests; latching of Read registers during reads; and
automatic forcing of TxD pin high in Mark Idle mode.

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M16550S: Enhanced UART

The Mentor Graphics M16550S core provides a fully programmable UART that is
functionally compatible with the NS 16550AF device.

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Inventra™ M16x50
Enhanced UART with FIFOs & IrDA Support

The M16x50 is an extension of the Inventra M16550S UART with FIFOs, with
enhancements that emulate features found in similar discrete devices with a range
of part numbers. Some of the enhancements are enabled by software and are
always present in the design: some – such as maximum FIFO size – are
configurable and are selected on compilation.

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Inventra™ MCAN2 CAN 2.0 Network Controller

The Inventra™ MCAN2 is a stand-alone controller for a Controller Area Network.
It provides an interface between a microprocessor and a CAN bus which carries out
all the actions of data encoding/decoding, message management, bit timing and resynchronization involved in transmitting and receiving data over a CAN network.

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MI2Cv2 I2C V2 Bus Interface

The MI2Cv2 provides an interface between a microprocessor and an I2
C bus that conforms to V2.1 of the I2C bus specification.

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M146818 Real Time Clock

The M146818 combines a complete time-of-day clock with an alarm, a 100-year
calendar, a programmable periodic interrupt, and a square wave generator. The
time can be in 12 or 24 hour mode, and time/calendar values can be stored in
binary or binary-coded decimal format. A daylightsaving time optionisavailable.

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Inventra™ MPCI32 32bit 33/66MHz PCI Core w/Cardbus support

The Inventra™ MPCI32 PCI Peripheral Soft Core implements the PCI
Master/Target function for 32bit peripherals connecting to a 32bit PCI Bus.

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Inventra DATASHEET ™ RTL Products

Large portfolio of RTL IP Cores in both Verilog and VHDL. A Single IP license agreement covers all our cores;

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coolSRAM-1T

Mentor Graphics coolSRAM-1T embedded memory IP is the industry’s only silicon-proven, single transistor SRAM IP solution that can be implemented in a bulk logic CMOS process without requiring additional masks or manufacturing steps.

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coolSRAM-6T

coolSRAM-6T embedded memory IP is an ideal solution for ASIC, ASSP and System-on-Chip (SoC) applications with stringent power, speed or area requirements. Embedded coolSRAM-6T is designed to deliver the best performance and power characteristics at any given instance size.

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coolSRAM-8T

coolSRAM-8T™ embedded memory IP is an ideal solution for ASIC, ASSP and System-on-Chip (SoC) applications with stringent power, speed or area requirements.

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coolREG

coolREGcan be customized via the MemQuest™ memory compiler, a Web-based on-line tool suite that enables the SoC designer to specify and implement custom memories in a matter of minutes.

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coolROM

The coolMemory compiler-based family of advanced embedded memories includes low-power, high-speed, and high-density configurable coolROM targeting the most demanding applications..

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coolCAM

coolCAM moves content-addressable memory from power-hungry super-chips to ordinary embedded SoC applications that can benefit from high-performance search.

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MemQuest Memory Compiler

The MemQuest™ memory compiler is a unique WEB based on-line tool suite that enables the SoC designer to specify and implement CUSTOM memories in a matter of minutes.

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